Following my initial design article, and the follow up design article, I’ve put quite a lot of thought into how I can make this Goldilocks Analogue device best achieve my stated goals. Pictured is the 2nd Goldilocks Analogue Prototype.
This is the working design document. It will grow as I get more stuff done, and notes added here. I’ve pretty much finished the paper design now, and will let it settle for a few weeks over the holiday season. It is sometimes good to do things twice, with a few weeks perspective from the original decisions.
My Revision Plans
Revert the uSD card 3V SPI bus drivers back to the quad and single buffers. The TXB/TXS story remains unresolved, and I can’t be bothered to work out why, when a simple answer is at hand. – DONE
Connect the uSD _CARD_DETECT to PC2 which has no other function except JTAG. – DONE
Remove the FTDI 6 pin for USART0. Or, better to move it to connect to USART1, so that USART1 can be addressed by an external FTDI device. Move it to the end of the board, so it doesn’t block Shield usage. Note the RTS/CTS Reset is not connected because this is replaced by a DAC A/B channel. – DONE
Remove the Analogue outputs from centre of board. Move them to the end of the board and integrate them into the FTDI USART1 socket on the RTS and CTS pin positions (obviously not on Tx or Rx pins, or on Vcc or GND either). – DONE
Connect the MCP4822 _LDAC pin to enable sychronisation of the A and B channels. Connect to PC3 which has no other function except JTAG. Remember the _LDAC is pulled to GND by default. – DONE
Have another look at the output filtering on the DAC, perhaps it could be a little stronger than the prototype with the corner at 23kHz. Single pole R1=68Ω C1=100nF. – DONE
This 2nd order filter is still linear, but filters significantly more than the single pole version on the prototype.
Using standard Resistor and Capacitor values R1=47Ω C1=100nF R2=47Ω C2=100nF in a 2nd order CR Low-pass Filter Design Tool.
Extend the prototyping area by three columns. – DONE
Add a pin-out to allow the DS3231 RasPi module (battery or super capacitor) from Seeed Studio to be easily attached. – DONE
Push the JTAG pads to the back of the board, without forgetting to flip the pin layout around. – DONE
Add SRAM or FRAM SPI storage. FRAM is non volatile storage, that has no delay. With a reasonable amount of storage we can use it to provide short audio samples, and get them back relatively easily, without file system and uSD card overheads. But FRAM is pretty expensive, and SRAM chips with same pin-out are available for much cheaper, that might fulfil the job of buffering or capturing samples.
MB85RS64V FRAM is the only reasonable device available for 5V supply. And it is a reasonable price of $1.80 per unit. But it is much too small to use as an analogue sample store. Need to use the 128kB MB85RS1MT FRAM version, but this required being driven from Vcc 3V3. At 8kHz sampling, 128kB gives us 16 seconds of sound, which is quite a lot. It costs around $6 which seems to be the sweet spot in pricing now. Will have to add another 3V3 to 5V MISO buffer. Use PC4 as the MB85RS1MT SPI _SS line.
Alternatively, just make the pinout for SPI 5V and implement SRAM using the Microchip 23LC1024 device, which is $2.50 each. We can choose FRAM or SRAM at assembly. Or even both, as there is a spare _SS available. So let’s do two devices at Vcc 5V supply.
Put 10kOhm pull-up resistors on all of these _SS lines, _CARD_DETECT and _HOLD. – DONE
Remove 10kOhm pull-down resistors on _LDAC forcing active _LDAC control. – DONE
Convert the 3.3V regulator to AP1117 type in SOT89-3 package. No space for SOT223. Upgrades the 3.3V supply from 150mA to 1000mA. Heat spread on Layer 2 GND and on Layer 15. – DONE
Initial Board Layout
I’ve finished the schematic and the board layout, and now I just have the detailed work of checking all the things, again, and again.
The Goldilocks Analogue Schematic in PDF format.
Front of board (All Layers)
The board is now pretty tightly packed. But, there is still a large number of options for prototyping on the board, or to exit the board with 8-pin headers. Each of Port A, Port B and Port D can be taken off board with one header each. Alternatively, a 2×8 connector can be attached, with the pins assigned and connected as desired.
The DAC A (L) and DAC B (R) channels are integrated into the far right edge of the board, along with TX1 and RX1 pins in the form of a FTDI 6 pin interface (including 5V and GND).
The first 5 pins of Raspberry Pi IO are replicated, to allow DS3231 RTC modules (designed for RaspPi) to be connected. For permanent mounting, the module can be flipped on its back to show the battery, and be mounted over the DAC which keeps the prototyping area clear.
I have been able to fit 2x SPI SRAM (or FRAM or NVRAM) on the board, using the spare JTAG IO pins. It is very tight, but having the option to fit up to an extra 2Mbit of SRAM will be quite useful for buffering and storing large amounts of data (audio, or samples).
Top Layer no silk
Labels for the DAC A and DAC B and FTDI interface have been put into the keep-out layer in the silk screen on the edge. They will appear when the silk is printed.
Added Test Points for the 3.3V SPI signals, which are the only signals that can’t be tested off a pin-out somewhere.
Layer 2 – GND
The GND plane remains whole under the DAC and Amplifiers.
Layer 15 – 5V (and 3.3V)
The 5V layer, with the 3.3V and AVCC 5V supplies too.
Bottom Layer & Silk
All the pin-outs are defined on the bottom. Unfortunately, there is no space on the top layer.
The JTAG is now pushed to the back of the board. This will make using the JTAG more diffiicult, but at least it will not interfere with shields, should the solution require testing when in a system.
This the map of the ATmega1284p pins to the Arduino physical platform, and their usage on the Goldilocks Analogue
|328p Feature||328p Pin||1284p Pin||1284p Feature||Comment|
|Analog 4||SDA||PC4||PA4||PC1 I2C -> Bridge Pads|
|Analog 5||SCL||PC5||PA5||PC0 I2C -> Bridge Pads|
|Digital 2||INT0||PD2||PD2||INT0 / RX1||Xtra USART1|
|Digital 3||INT1 / PWM2||PD3||PD3||INT1 / TX1||Xtra USART1|
|Digital 4||PD4||PD4||PWM1||16bit PWM|
|Digital 5||PWM0||PD5||PD5||PWM1||16bit PWM|
|Digital 8||PB0||PB2||INT2||<- _INT/SQW Open Drain
I2C RasPi RTC Socket
|Digital 10||_SS / PWM1||PB2||PB4||_SS / PWM0||SPI|
|Digital 11||MOSI / PWM2||PB3||PB5||MOSI||SPI|
|(Digital 14)||PB0||T0||-> SDCard SPI _SS 3V3|
|(Digital 15)||PB1||T1||-> MCP4822 SPI _SS|
|SCL||PC0||SCL||I2C – Separate|
|SDA||PC1||SDA||I2C – Separate|
|PC2||TCK JTAG||<- _CARD_DETECT
for uSD Card
|PC3||TMS JTAG||-> MCP4822 _LDAC|
|PC4||TDO JTAG||-> RAM SPI _SS_RAM0|
|PC5||TDI JTAG||-> RAM SPI _SS_RAM1|
|PC6||TOSC1||<- 32768Hz Crystal|
|PC7||TOSC2||-> 32768Hz Crystal|
|(Analog 6)||PA6||-> Pad / Hole|
|(Analog 7)||PA7||-> Pad / Hole|
Discussion on RTC
At the end of the day, the DS3232 / DS3231 device is around $8 best case to me. But modules are available complete with super capacitors from Seeed for around $6. There’s no win here. Stick to the crystal and existing solution, but make it easier to use the Seeed RasPi solution.
Digikey has the DS3231 at $8 per piece. This is pretty expensive, for what it delivers. And there are solutions available with super capacitor backing for under $6 from Seeed.
Design in the DS3232 on the TOSC1 input for the TCXO 32kHz clock and PC5 input for the INT/SQW line. Supply from 3V3 Vcc. Read that the I2C lines can run to 5V5 without issue. INT/SQW outputs are open drain and the INT/SQW can be disabled (high impedance). Let the ATmega1284p switch on its pull-ups for INT/SQW to function. Make sure 20kOhm pull ups on the SCL/SDA lines too.
The DS3232 has 236 Bytes of SRAM, and a push-pull output on TCXO 32kHz line so this is better as an asynchronous clock input.There is an accurate (0.25°C) thermometer function included. It comes in an 20SOIC package which is quite large. Having some SRAM will be very useful for storing configurations that change often (where EEPROM would wear out).
The DS3232M has 236 Bytes of SRAM, and a push-pull output on 32kHz line so this is better as an asynchronous clock input. Having some SRAM will be very useful for storing configurations that change often (where EEPROM would wear out). But, it doesn’t have 5.5V capability on its I2C lines. – Deselect
The DS3231 version comes in an 16SOIC package, which might be better, but it doesn’t have any SRAM, and the TXCO is open drain. – If we need smaller then this is where we go.
The DS3231M MEMS version comes in an 8SOIC package, which might be better, but it is only +-5ppm (rather than +-2ppm). – Don’t need the small package, so go for XTAL version DS3231 in the SOIC16 package.
Digikey has the DS3232 at $8.60 per piece. This is pretty expensive, for what it delivers.
Delete the 32kHz crystal, and capacitors.
Add on a 3V Lithium battery holder. Or a Super Capacitor and a charging diode
Leave the TOSC2 pin floating, as it is not useable when the Timer 2 Asynchronous Clock Input is enabled on TOSC1.
Remove pull-up resistors from RST, as the DS3231 has pull-ups as does the ATmega1284p. The DS3231 has a debounce and 250ms delay function to manage the MCU start up.
Design Input from Angus
IC6 is missing silkscreen marking for pin 1. – DONE
Designator layer needs a cleanup. I had to spend a lot of time in
EAGLE checking which components were which, and what orientations
they had. On such a full board with close-spaced components this is
very important – ideally place each designator between the pads it
refers to, with a consistent orientation relative to the pads. – DONE
Some 0603/0402 components seemed to have wrong pad sizes compared to
BOM output, ie R17 & C13. I placed according to what parts were
supplied. I know this has been revised further but it might be worth
checking BOM output for any remaining anomalies. – CHECKED
If possible move components away from IC bodies, for example C36 is
very close. Even for a pick & place machine I suspect this would be
hard. – DONE
Labels on silkscreens would be very helpful. For instance the power
selection & DTR jumpers, other pin breakouts. For Freetronics boards
we aim to have all of these connections self-documenting, ie each
option labelled somehow. This can be difficult but part of the
appeal of a development board is being able to easily make
customisations without requiring an external reference. – DONE
It’d be great if you could find a way to better convey the offset
pin numbering for pins 8-13. – NO BETTER ANSWER
The MCU 1284p solder stencil paste layer has too large of an
aperture for the thermal pad. If you look at the paste layer of IC1
and compare to IC2 then you’ll see what I mean. The aperture needs
to be cut down in this way or the central pad gets too much paste
and “floats” up, leading to the outer connections not forming
correctly. – OK Can’t change Library
Suggest adding test points for likely problem connections. ie
analogue section power rails, 3.3V SPI connections, raw DAC
outputs. These can just be bare SMD pads on top or bottom of
board. Label with a designator (at least) or a descriptive label if
possible. For an example of what I mean, the OpenVizsla boards have
a really nice set of 4 power test points near the bottom of the
board. – DONE Power is easy off pins. Added 3.3V SPI test points. Other pins all have pin-outs.
Design Input from Freetronics Forum
Keep the JTAG header, but also distribute the pins to the 2nd Non-Arduino shield pins. – Going to push the JTAG to the back of the board. It will be inconvenient to use, but won’t block the use of Shields when it is actually being used so this is better. This also frees more space for a RTC and battery option. – DONE
Add a RTC option. – Using the 32kHz crystal on Timer 2 the RTC is working fine. Battery and power options can be off board, and as comprehensive and accurate as needed. – DONE
Other RTC options include using the DS3231, which would be more accurate than a 32kHz crystal, and includes an integrated RST debounce timer. Can use the 32kHz output to feed the ATmega1284p Timer 2 and therefore have both devices locked to the same clock. Chronodot as an example for using this RTC. – DONE