Characterising Am9511A-1 APU

I’ve built a Z180 based board, supporting the AM9511A APU. Partly for historical enjoyment. Partly because it is actually still faster than “modern” Z80 devices.

For example, from the Am9511/Am9512 Floating Point Processor Manual by Steven Cheng, we have comparison tables. On average the Am9511A APU (at 1.966MHz) produces a hardware floating point divide in 165.9 cycles (of a 2MHz 8080 processor). Converted to my Am9511A implementation (at 2.304MHz), we have the equivalent in 141.5 cycles of the 2MHz 8080. Converted to best case modern Z180 terms (overclocked to 36.864MHz) this is 2,609 CPU cycles to return a hardware floating point divide.

To produce an equivalent software floating point divide, using the LLL floating point library, requires 13,080 cycles.

This means that floating point on the 40 year old AM9511A APU is still 5.0 times faster than an overclocked Z180. Sweet!

Testing

I’m integrating an Am9511A-1 APU device into my YAZ180 build. The basic device is capable of operating at 3MHz. But, I’ve found that driving one sample at 3.072MHz doesn’t work. But, it works fine at 1.536MHz.

This one example has 83.33ns delay between RD or WR and PAUSE signal being operated. This means that it should comfortably operate with the minimum of one wait state when the Z8S180 is running with a 18.432MHz bus.

And, I’ve got to say that these devices run hot… OHS issue hot. There is a reason they are provided in a ceramic package. They sink 70mA at 12V plus another 70mA at 5V, and all that energy has to go somewhere.

The timing for the Am9511A-1 is generated by dividing the Z8S180 18.432MHz system clock by 6.  The divide FCPU by 6 for FAPU CLK 3.072MHz is done with a SN74LS92N device. And for test purposes, the Z8S180 is also half rate clocked at 9.216 MHz, producing 1.576MHz for the APU.

img_0620

YAZ180 Test Rig – Am9511A-1

The test is initially pretty simple. Will they properly push and pop data at 3.072MHz?
If not, then I’ll need to redesign the YAZ180 to operate the Am9511A-1 at a lower APU clock. But, if my initial samples are just not the up to specification, then they can be secondary devices.

Ok, now what kind of devices have I got to hand, and lets see what the results are…

Front Serial ID Country & Rear ID 3.072MHz 1.576MHz
239KH2Z Malaysia 9237FP Fail Pass
301MBZP Malaysia 9252CP Fail Pass
3368YF8 Malaysia 9335CP Fail Pass
348W76S Malaysia 9347DP Fail Pass
921BDIV Philippines 8917WM Fail Pass

Kind of boring really. Pretty clear that AMD oversold the capability of its Am9511A-1 to run at 3MHz. Or, I’m not feeding them with the correct timing.

I’ll need to redesign the YAZ180 to provide a divided by 8 clock at 2.304MHz, and cross my fingers that they work at that clock rate.

There will be more here as I test different versions. Perhaps, one day I’ll find a magical device that will run at 3.072MHz…?

3 thoughts on “Characterising Am9511A-1 APU

  1. Pingback: Yet Another Z80 Project (YAZ180) | feilipu

  2. Pingback: Yet Another Z180 (YAZ180 v2) | feilipu

  3. I got to here from your retrochallenge entry. I am completely shocked a 40 year old 2 mhz float processor still beats out a 36 mhz Z180. Now I want to figure out how many clocks an arduino takes for float division.

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s